
Introduction
The MR536 series chip integrates multiple high-performance computing units such as a Quad-Core Arm® Cortex®-A55 CPU, NPU, MCU, etc., bringing more scalability to control power by integrating high-performance heterogeneous multi-core processor architectures. Among them, NPU supports Transformer model and 130+ operators, further enhancing cognitive ability. Its deeply customized real-time control architecture and rich interfaces enable independent MCU systems, providing complete and easy-to-use robot matching solutions that can be applied to fields such as sweeping robots, lawn mowing robots, logistics robots, service robots, toy robots, etc.
(*The MR536 series includes multiple variants with slightly different specifications. This page describes the MR536MX-N3Z model; for other variants, please refer to the official datasheet.)
Benefits
Specifications
CPU | Quad-Core Arm Cortex-A55 CPU, up to 1.8GHz |
MCU | RISC-V XuanTie E907, up to 600MHz |
NPU | 3 Tops |
Memory | Support DDR3/DDR3L/LPDDR3 Support DDR4/LPDDR4/LPDDR4x Memory capacity up to 8 GB |
Video Encoder | H.264 - 4K@25fps JPEG - 8192*8192 |
Camera | Parallel CSI - 8/10/12/16-bit width MIPI CSI - 2*4-lane/4*2-lane/4+2*2-lane |
Interface | PCIe 2.1/USB 3.1, USB 2.0 DRD & HOST, SDIO 3.0, GMAC *1
UART *17, TWI *9, SPI *6 PWM *34, IR RX *5, IR TX *1, LEDC GPADC *31, TPADC *4, LRADC *1
GPIO *215 |
Software System | Tina Linux FreeRTOS |
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